| PART |
Description |
Maker |
| UPD42S4800LLE-A10 UPD424800LLE-A10 UPD424800LG5-A8 |
x8 Fast Page Mode DRAM
RoboClockII™ Junior, High Speed Multifrequency PLL Clock Buffer
Programmable Skew Clock Buffer
RoboClock® High-speed Multi-phase PLL Clock Buffer
Low Skew Clock Buffer x8快速页面模式的DRAM
RoboClock® High-speed Multi-phase PLL Clock Buffer
|
NEC TOKIN, Corp.
|
| CY2309CZXI-1 CY2309CZXI-1H CY2309CZXI-1HT CY2309CZ |
3.3 V Zero Delay Clock Buffer
3.3V Zero Delay Clock Buffer 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
Cypress Semiconductor, Corp.
|
| IDT23S09E-1PGI IDT23S09E-1HPG IDT23S09E-1HDC IDT23 |
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 23S SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE 3.3零延迟时钟缓冲器，扩频兼
|
Integrated Device Technology, Inc.
|
| CY2PP3220AI CY2PP3220AIT CY2PP3220 |
Dual 1:10 Differential Clock/Data Fanout Buffer
Dual 1:10 Differential Clock / Data Fanout Buffer 2PP SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
|
CYPRESS[Cypress Semiconductor]
Cypress Semiconductor, Corp.
|
| IDT2309-1HPG IDT2309-1HDCG IDT2309-1DCG IDT2309-1H |
3.3V ZERO DELAY CLOCK BUFFER Phase-Lock Loop Clock Distribution
|
Integrated Device Technology
|
| CY7B994V-5BBXI CY7B994V-2AXC CY7B994V-2AXCT CY7B99 |
High Speed Multi Phase PLL Clock Buffer
High-Speed Multi-Phase PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 12 MHz to 100 MHz; Outputs: 18; Operating Range: 0 to 70 C 7B SERIES, PLL BASED CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100
|
Cypress Semiconductor, Corp.
|
| MC100ES6226 |
2.5/3.3V Dlfferentlal LVPECL 1:9 Clock Distribution Buffer and Clock Dlvlder
|
Motorola
|
| ICS9DB108 ICS9DB108YFLFT |
From old datasheet system
Clock Buffer
Eight Output Differential Buffer for PCI-Express 8个输出差分缓冲器支持PCI - Express
|
Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
|
| PO74HSTL85352ASR PO74HSTL85352ASU PO74HSTL85352A-1 |
The PO74HSTL85352A is a low-skew, 1-to-2 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.
LVCMOS Input to HSTL Output 1:2 Fanout Buffer
|
Potato Semiconductor Corporation
Potato Semiconductor Corpor...
|
| QS5805T QS5805BT QS5805AT QS5805T_DATASHEET QS5805 |
Five Distributed-Output Clock Driver
From old datasheet system
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
|
IDT
|
| IDT5T9304PG IDT5T9304PGG 5T9304PGGI |
LVDS, 1:4 Clock Buffer Terabuffer
5T SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
|
INTEGRATED DEVICE TECHNOLOGY INC
|
